3
1
Back

DSO-8 SOIC SOIC-8 Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias 10-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9 mm Body with Exposed Pad Variation BB; (see Linear Technology DFN_6_05-08-1703.pdf 6-Lead Plastic Small Outline (SO) (http://www.everlight.com/file/ProductFile/201407061745083848.pdf 5-Lead Plastic Small outline http://www.ti.com/lit/ml/mpds158c/mpds158c.pdf VSO40: plastic very small outline package http://www.ti.com/lit/ds/symlink/drv8301.pdf HVSSOP, 10 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3805fg.pdf#page=18), generated with kicad-footprint-generator connector wire 0.75sqmm strain-relief Soldered wire connection with feed through strain relief, for 4 times 1.5 mm² wire, reinforced insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator ipc_noLead_generator.py WDFN, 6 pin, 2.54mm pitch, double rows Surface mounted pin header THT 2x35 2.00mm double row Through.

New Pull Request