3
1
Back

SOIC-8 Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal pad with vias; (http://www.ti.com/lit/ds/symlink/drv8800.pdf HTSSOP, 16 Pin (JEDEC MO-153 Var EA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated.

New Pull Request