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Images/PXL_20210831_000922493.jpg create mode 100644 Panels/luther_triangle_vco_quentin_v3_blank.stl.stl create mode 100644 Hardware/PCB/precadsr/potsetc.sch create mode 100644 Synth_Manuals/Module Summaries.ods pushed tag v1.0 to synth_mages/MK_SEQ 18e376c67c Merge pull request 'pcb_finalization' (#1) from bugfix/10hp into main ... Add notes about UX component wiring 55ee65a5e9 Checkpoint.

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