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Cross at 90° to minimize capacitance between traces vias connect through the power subsystem 972d8b1e07 adds front panel candidates v1 and v2

Added schmancy pcb for v2 front panel Added schmancy pcb for v2 front panel and pcb into different files Fireball/Fireball.kicad_pcb | 2 ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:39:59 2021 ; FORMAT={-:-/ absolute / metric / decimal} Schematics/schematic_bugs_v1.txt Normal file Unescape # precadsr.sch BOM Sat.

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