3
1
Back

Images/PXL_20210831_001017829.jpg Period: 1 year Overview 0 Active Pull Requests revised README.md to rev 2 beta revised README.md to rev 2 beta by adding +5V, and both trigger/gate and CV routing updates led holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf 9-pin.

New Pull Request