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Https://support.epson.biz/td/api/doc_check.php?dl=app_TG2520SMN&lang=en Latest commits for file Images/capsocket.png b554ec2138 Add footprint items for panel holes; separate panel and pcb into different files Add a horizontal wall (across the panel module v_wall(h, l, wall_thickness); Align panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Updates from real TL0x4, fix pots being backwards, tighten up schematic, fit letter.

• Ptc resettable fuse polyfuse THT PTC Resettable.
• Non Al panel Gerbers.
• DRC ground plane on only.
• -0.682453 -0.560081 0.469646 facet normal.

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