Labels Milestones
BackFile Panels/luther_triangle_vco.scad Executable file View File Schematics/notes.txt Normal file View File Hardware/PCB/precadsr_aux_Gerbers/precadsr-NPTH.drl Normal file View File // testing futura vs quentincaps in F6 rendering module.
- -0.703569 -0.707135 -0.0703577 vertex 9.38269 -1.41421.
- Row RJ14 connector 6P4C Connfly DS1133 RJ25 6P6C.