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{ "defaults": { PCB initial layout, no traces "min_copper_edge_clearance": 0.0, PCB initial layout, no traces "solder_mask_clearance": 0.0, PCB initial layout, no traces }, Add ground fills, fix some clearance issues, make all power traces large "rules": { PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups afea9d5a2c Final revision; added custom DRC as project file (pts Final revision; added custom DRC as project file tstamp 62e17d71-a82e-47f7-8a14-a0885fbe0008) Final revision; added custom DRC as project file Fireball/Fireball.kicad_dru | 102 Fireball/Fireball.kicad_pro | 32 Fireball/Fireball.kicad_sch | 4 .../PCB/precadsr_Gerbers/precadsr-F_Mask.gbr | 4 | 1M | Resistor | | | Tayda.

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