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Back*.bck New KiCad version; non Al panel Gerbers # Netlist files (exported from Eeschema *.csv *.lck ########################## # Additional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes Total unplated holes count 16 Not plated through holes: ============================================================= 969311f00cbb6d6ece9a25b5fb1d4e2884e468c0 main MK_SEQ/Schematics/Unseen Servant/Unseen Servant.kicad_pcb Normal file Unescape D Rotary switch, 4-bit encoding, 16 positions, Real code K rotary hex Complementary D Rotary switch, 4-bit encoding, 10 positions, Gray code K rotary hex Gray D 1x DIP Switch, Single Pole Single Throw (SPST) switch, small symbol D Push button switch | | | | | J5, J12, J13 | 3 | 10uF | Polarized capacitor | | | | C9 | 4 | 100k | Resistor | | | | J1 | 1 | SW_3PDT_x3 | Switch, triple pole double throw, separate symbols"/>