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Folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: merged pull request 'new_footprints' (#5) from new_footprints into main ... Add notes about UX component wiring initial notes for v1 build Schematics/bad_trace_v1.jpeg Normal file View File sr1_full.png Normal file Unescape Hardware/Panel/precadsr-panel/precadsr-panel.pretty/precadsr-panel-holes.kicad_mod Normal file View File Datasheets/tl074.pdf Normal file Unescape # precadsr.sch BOM Documentation, some cosmetic sh/PCB updates main synth_tools/Schematics/SynthMages.pretty/Perfboard_3x12.kicad_mod 80 lines Add radio shaek with cv2 version From a295bd71525185b616796bece6c52d455905c9b6.

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