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L1/L2" "Notes": "Layer F.Paste" "Notes": "Layer F.SilkS" "Notes": "Layer F.Paste" "Notes": "Layer B.Cu" "Notes": "Layer F.Paste" "Notes": "Layer B.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.Mask" "Notes": "Layer B.Mask" "Notes": "Layer B.Paste" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.SilkS" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:40:31 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes Total unplated holes count 16 Not plated through holes are merged with plated holes count 16 Latest commits for file Images/precadsr-panel.png master PSU/Synth Mages Power Word Stun.kicad_sch Forget (and ignore) fp-info-cache file.

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