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Button. - CV Out - Diode from rotary pin 13? CV Out - 1K to U2-14 - Casc Out normal to Reset In - diode to U2-3 - Clock rate goes down when resistance goes up, opposite to expectation. Schematic fixes: - C1 is too small; need more than 100k to get below 200bpm -- Clock POT is too small; need more than 100k to get 1:1 between schematic and PCB, .../Unseen Servant/Unseen Servant.kicad_pro | 6 Latest commits for branch luther_diy_schematic More layout updates created pull request 'More schematics' (#3) from schematic by Eeschema 5.1.10-88a1d61d58~90~ubuntu20.04.1 **Component Count:** 75 **Component Count:** 75 0 0 Y N 1 F N DEF Vactrol U 0 5 Y Y 1 F N DEF SW_SPDT_MSM SW 0 0 N Y 1 F P Hardware/Panel/precadsr-panel/precadsr-panel-rescue.kicad_sym Normal file View File 3D Printing/Cases/Eurorack 2-Row/eurorack.scad Executable file View File 3D Printing/Cases/Eurorack Modular Skeleton History The body text, captions, sub-headers, etc. In AD&D 1e MM, PHB, and DMG used Futura typeface. Delete 'Panels/futura medium bt.ttf' Panels/futura light bt.ttf differ Binary files /dev/null and b/Synth_Manuals/LABOR_MANUAL.pdf differ Binary files /dev/null and b/3D Printing/Panels/Radio_shaek_standoff_padded_2.stl differ Binary files /dev/null and b/3D Printing/Pot_Knobs/scaled_french_pot.mix differ Binary files /dev/null and b/Panels/luther_triangle_vco_quentin_v3_blank.stl.stl differ Binary files /dev/null and b/Panels/Font files/Quentincaps.ttf differ Binary files /dev/null and b/Images/befaco_vcadsr.png differ master PSU/Synth Mages Power Word Stun Panel.kicad_prl | 77 Fireball/Fireball_panel.kicad_pro | 6 Panels/FIREBALL VCO.png | Bin 0 -> 10174 bytes .../PRISMATIC SPHERE.png | Bin 0 -> 37432 bytes Panels/futura medium condensed bt.ttf' 16055f0ae5 Delete 'Panels/futura medium bt.ttf' From 496e3e33446b55a1a2a83a967e779b5254a33381 Mon Sep 17 00:00:00 2001 .../Panels/MAGIC MOUTH.png | Bin 0 -> 16561 bytes 3D Printing/Panels/MAGIC MISSILE VCF.png | Bin 0 -> 171113 bytes Schematics/Luthers_VCO_schematic.pdf | Bin 0 -> 445539 bytes Images/precadsr-panel-holes.png | Bin 0 -> 1303306 bytes Panels/FireballSpellVertSmall.png | Bin 0 -> 12724 bytes .../POLYMORPH.png | Bin 0 -> 30552 bytes From 811ef45c764021f623b8bb59234df1314fce4e91 Mon Sep 17 00:00:00 2001 Subject: [PATCH 1/2] Fix rail clearance issues, make all power traces large Add ground fills, fix some clearance issues, make all power traces large 8576ad9482 Added input resistor for sync; placed everything on PCB 7f9b624c8e tweaks layout with input from sam 52b504dd7c Delete 'Panels/futura medium bt.ttf' Panels/futura medium bt.ttf // 13 SPDT switches (many used as a kind of odd LFO. * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md ``` git clone --recurse-submodules git@github.com:holmesrichards/precadsr.git ``` Schematics/Enlarge/Enlarge.kicad_pcb Normal file View File 3D Printing/Panels/AD&D 1e spell names in Filmoscope setup Add ground fills, fix some clearance issues, make all power traces large 8576ad9482 Added input.

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