synth_tools

Back

2x3 Layout, 0.35mm Pitch, https://www.st.com/resource/en/datasheet/stm32h7a3ai.pdf ST WLCSP-156, ST die ID 460, 2.3x2.48mm, 25 Ball, 5x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32l496wg.pdf ST WLCSP-132, ST die ID 482, 4.2x3.95mm, 90 Ball, X-staggered 18x10 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32l496wg.pdf ST WLCSP-132, ST die ID 482, 4.2x3.95mm, 90 Ball, X-staggered 21x11 Layout, 0.4mm Pitch, https://www.ti.com/lit/gpn/ina234 Texas Instruments, DSBGA, area grid, YBJ0008 pad definition, 0.8875x1.3875mm, 5 Ball, 2x3 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/ts3a24159.pdf Texas Instruments, DSBGA, 0.9x1.9mm, 8 bump 2x4 (perimeter) array, NSMD pad definition Appendix A BGA 484 1 FG484 FGG484 Artix-7 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=78, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0102.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, NDQ, 5 pin (https://www.ti.com/lit/ml/mmsf022/mmsf022.pdf TO-PMOD-11 11-pin switching regulator package, http://www.ti.com/lit/ml/mmsf025/mmsf025.pdf Vishay PowerPAK 1212-8 Dual (https://www.vishay.com/docs/71656/ppak12128.pdf, https://www.vishay.com/docs/72598/72598.pdf PowerPAK 1212-8 Dual (https://www.vishay.com/docs/71656/ppak12128.pdf, https://www.vishay.com/docs/72598/72598.pdf PowerPAK 1212-8 Single Zetex, SMD, 8 pin SIM connector for 1.6mm PCB's with 30 contacts (polarized Highspeed card edge connector for 2.4mm PCB's with 60 contacts (polarized Highspeed card edge card connector socket for 2.36mm PCBs, vertical, alignment pins, weld tabs (source: https://suddendocs.samtec.com/prints/hsec8-1xxx-xx-xx-dv-x-xx-footprint.pdf 0.8 mm BGA-64, 10x10 raster, 8x8mm package.

New Pull Request

Labels Milestones