3
1
Back

Unescape Hardware/Panel/precadsr-panel/precadsr-panel.pretty/precadsr-panel-art.kicad_mod Normal file Unescape Hardware/Panel/precadsr_panel_al_Gerbers/precadsr_panel_al-F_Mask.gbr Normal file Unescape Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 Not plated through holes are merged with plated holes count 0 Minor layout tweaks Minor layout tweaks Schematics/Fireball_VCO.pdf | Bin 0 -> 110393 bytes Images/PXL_20210831_000949090.jpg | Bin 0 -> 38764 bytes Panels/futura medium bt.ttf | Bin 0 -> 70804 bytes README.md .

New Pull Request