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Threshold (HP) four_hole_threshold = 10; // Number of faces around the knob? Knurled = 1; // actually.. I don't know what this does. Pad = 0.2; // this gets added to the ending of de minimis and the MCP4922 DAC (others may work). Probably can build our own based on http://www.latticesemi.com/view_document?document_id=213 BGA 0.8mm 9mm 121 BGA-132 11x17 12x18mm 1.0pitch Altera BGA-144 M144 MBGA Altera VBGA V81 BGA-81 Altera BGA-100 M100 MBGA 121-ball, 0.8mm BGA (based on http://www.latticesemi.com/view_document?document_id=213 BGA 0.8mm 9mm 121 BGA-132 11x17 12x18mm 1.0pitch Altera BGA-144 M144 MBGA Altera BGA-153 M153 MBGA Altera BGA-153 M153 MBGA Altera VBGA V81 BGA-81 Altera BGA-100 M100 MBGA 121-ball, 0.8mm BGA (based on http://www.latticesemi.com/view_document?document_id=213 Lattice caBGA-756, ECP5 FPGAs, 27.0x27.0mm, 756 Ball, 32x32 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=26 ST uTFBGA-36, 0.25mm pad, 3.6x3.6mm, 36 Ball, 6x6 Layout, 0.5mm Pitch, https://ww1.microchip.com/downloads/en/DeviceDoc/16B_WLCSP_CS_C04-06036c.pdf WLCSP-20, 4x5 raster, 1.934x2.434mm package, pitch 0.5mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f469ni.pdf WLCSP-180, 13x14 raster, 5.537x6.095mm package, pitch 0.4mm; see section 6.8 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf TFBGA-265, 17x17 raster, 14x14mm package, pitch 0.5mm (http://www.analog.com/media/en/package-pcb-resources/package/56702234806764cp_24_3.pdf, http://www.analog.com/media/en/technical-documentation/data-sheets/ADL5801.pdf LFCSP VQ, 48 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/ Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/ Infineon PG-DSO 12 pin, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/84299/vor1142b4.pdf SSO Stretched SO SOIC Pitch 1.27 SSOP-8 2.9 x2.8mm Pitch 0.65mm Slug Up (PowerSO-20) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/tda7266d.pdf, www.st.com/resource/en/application_note/cd00003801.pdf HSOP, 32 Pin (https://www.ti.com/lit/ds/slvs589d/slvs589d.pdf#page=33), generated with kicad-footprint-generator Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xx-DV-TE, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator JST SUR series connector, 502386-1270 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py LGA, 14 Pin (JEDEC MS-013AD, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_wide-rw/RI_20_1.pdf), generated with kicad-footprint-generator Molex Mini-Fit Sr. Power Connectors, old mpn/engineering number: 5566-24A2, example for new part number: 26-60-5070, 7 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator Inductor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator Connector Phoenix Contact connector footprint for: MSTBV_2,5/14-GF; number of pins: 06; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843295 8A 160V Generic Phoenix Contact connector footprint for: MC_1,5/15-GF-3.81; number of pins: 15; pin pitch: 5.08mm; Vertical; threaded flange || order number.

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