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Level chip-size package; 15 bumps (6-3-6), 2.37x1.17mm, 15 Ball, 6x3 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100168.PDF XBGA-121, 11x11 raster, 10x10mm package, pitch 0.4mm; see section 36.2.3 of http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42363-SAM-D11_Datasheet.pdf WLCSP-56, 7x8 raster.

• Cd18ed43dc Added hard sync input. CV in.
• -4.001087e+000 -8.723810e-001 2.470218e+001 facet normal 1.876690e-15 2.158511e-16.
• From schematic by Eeschema.

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