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Review "extra_units": "error", "global_label_dangling": "warning", "hier_label_mismatch": "error", "label_dangling": "error", "lib_symbol_issues": "warning", More tweaks after pro review More tweaks after pro review More tweaks after pro review 19116ba39d Apply jlcpcb's design rules, small fixes for those 972e45fb78 Go to file 5e32fb4fc0 Change transistor footprint to inline_wide, fix DRC ground plane Updates from real TL0x4s bugfix/triangle_smoothness Forget (and ignore) fp-info-cache file as it is safe to put the notice.

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