synth_tools

Back

APERTURE END LIST* From 53078fc12d453d1ea52425870f35daf2579ab714 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add kicad schematic, some diylc noodling Binary files /dev/null and b/3D Printing/Panels/Radio_shaek_standoff_padded_2.stl differ Binary files /dev/null and b/Schematics/bad_trace_v1.jpeg differ Panels/luther_triangle_vco_quentin_v4.scad Normal file View File main precadsr/Docs/precadsr_bom.md 59 lines Latest commits for file Schematics/SynthMages.pretty/Perfboard_1x12.kicad_mod # Temporary files *.000 *.bak Initial version .gitignore | 1 aoKicad | 2 | 1M | Resistor | | | R3, R7 | 2 Smaller cap (476nF?) for C1 Ceramic 104s for C10, C14, might be fine, might introduce intermittents From c96644890cf0985bb0d02bb542ef75a0a00d53f2 Mon Sep 17 00:00:00 2001 Subject: [PATCH] PCB initial layout, no traces PCB initial layout, no traces "min_copper_edge_clearance": 0.0, PCB initial layout, no traces "solder_mask_clearance": 0.0, PCB initial layout, no traces "other_line_width": 0.15, PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups *-backups More repo cleanup, adopt github .gitignore file f45c980890 Align panel to integer pseudo-origin, remove testing text, decrease title label font so we don't lose it Futura Heavy BT.ttf rename to Panels/Futura Heavy BT.ttf (grid_origin 84.5 17.5 Mark board for extraction A symbol representing annotation for tab placement (condition "A.Type == 'track' && B.Type == A.Type && A.Net != B.Net" (condition "A.Type == 'track' && B.Type == 'graphic')")) # edge clearance condition "A.Type == 'pad' && B.Type == 'graphic')" (condition "A.Type == 'pad' && B.Type == 'graphic')")) # edge clearance condition "A.Type == 'via'" (condition "A.Type == 'pad' && B.Type == A.Type && A.Net == B.Net" condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'")) # drill/hole size condition "A.Type == 'via' && B.Type == 'track'" condition "A.Type == 'via' && B.Type == A.Type")) .

New Pull Request

Labels Milestones