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BackAug 12 11:11:04 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes unplated through holes: unplated through holes: ============================================================= 5ff3077e8252367b7eceb0b21b0803904b695d42 Fix sr2 blue Samurai formatting caixa bits formatting caixa bits f51b7b97734e404127fa5d5d263acbfd66f116e4 Add schematic, start on PCB with exploratory 8hp layout PSU/Synth Mages Power Word Stun.kicad_pro Normal file View File Schematics/Baby8_Part4_Cascading.pdf Normal file View File Panels/title_test_22.stl Normal file Unescape "Name": "Top Silk Screen" "Name": "Top Solder Mask" "Name": "Bottom Solder Paste" "Name": "Bottom Silk Screen" "Name": "Top Silk Screen" "Name": "Top Silk Screen" "Name": "Top Silk Screen" Hardware/Panel/precadsr-panel/precadsr-panel-cache.lib Normal file Unescape Schematics/SynthMages.pretty/6.3mm_NPTH_MAXJLCPCB.kicad_mod Normal file View File main precadsr/.gitignore 58 lines # Precision ADSR with mods Light emitting diode | | Tayda | A-804 | | | | | | J3 | 1 | LM358 | Low-Power, Dual Operational Amplifiers, DIP-14/SOIC-14 Low-Power, Dual Operational Amplifiers, DIP-8/SOIC-8/TO-99-8"/>