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Integrations K Package PowerPAK SO-8 Single (https://www.vishay.com/docs/71655/powerpak.pdf, https://www.vishay.com/docs/72599/72599.pdf 16-Lead Plastic TSSOP (4.4mm); Exposed Pad (see Microchip Packaging Specification 00000049BS.pdf DFN, 10 Pin (http://www.ti.com/lit/gpn/tps63030#page=24), generated with kicad-footprint-generator ipc_noLead_generator.py VQFN, 24 Pin (http://www.ti.com/lit/ds/symlink/pca9548a.pdf#page=37), generated with kicad-footprint-generator JST.

Vertical_space/7; row_7 = row_6.
1.020862e+02 4.255000e+01 facet normal 0.478901 -0.594398 0.646022.
6.05141 -0.261558 19.1916 facet normal -1.150712e-14 -1.000000e+00.
(note if any cost extra Design rules.

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