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0.9x1.9mm, 8 bump 3x3 array, NSMD pad definition Appendix A BGA 676 1 FG676 FGG676 Spartan-7 BGA, 14x14 grid, 8x8mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l476me.pdf WLCSP-81, 9x9 raster, 4.039x3.951mm package, pitch 0.4mm; see section 7.1.1 of http://www.st.com/resource/en/datasheet/stm32f401ce.pdf WLCSP-49, 7x7 raster, 3x3mm package, pitch 0.4mm; http://www.fujitsu.com/global/documents/products/devices/semiconductor/fram/lineup/MB85RS1MT-DS501-00022-7v0-E.pdf Infineon LFBGA-292, 0.35mm pad, 17.0x17.0mm, 292 Ball, 20x20 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=24 FBGA-78, 10.5x8.0mm, 78 Ball, 9x13 Layout, 0.8mm Pitch, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-bga/05081600_0_bga49.pdf https://www.analog.com/media/en/technical-documentation/product-information/assembly-considerations-for-umodule-bga-lga-package.pdf BGA 324 0.8 GateMate FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm, 12 Ball, 3x4 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf BGA 12 0.5 R-XBGA-N12 Texas Instruments, DSBGA, area grid, NSMD, YZP0005 pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g031y8.pdf ST WLCSP-20, ST die ID 479, 3.56x3.52mm, 64 Ball, 8x8 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100489.PDF WLCSP-25, 5x5 raster, 2.423x2.325mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f071v8.pdf WLCSP-63, 7x9 raster, 3.228x4.164mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103tb.pdf UFBGA-132, 12x12 raster, 7x7mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UCBGA-49, 7x7 raster, 3.277x3.109mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/DM00257211.pdf WLCSP-49, 7x7 raster, 3.417x3.151mm package, pitch 0.5mm; see section 7.6 of http://www.st.com/resource/en/datasheet/DM00257211.pdf WLCSP-64, 8x8 raster, 3.623x3.651mm package, pitch 0.4mm; see section 36.2.3 of http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42363-SAM-D11_Datasheet.pdf WLCSP-56, 7x8 raster, 3.170x3.444mm package, pitch 0.8mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf WLCSP-64, 8x8 raster, 3.357x3.657mm package, pitch 0.5mm; see section 6.6 of http://www.st.com/resource/en/datasheet/DM00273119.pdf X1-WLB0909, 0.89x0.89mm, 4 Ball, 2x2 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stulpi01a.pdf TFBGA-64, 8x8 raster, 5x5mm package, pitch 0.8mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf UFBGA-201, 15x15 raster, 10x10mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UFBGA-15, 4x4, 3x3mm package, pitch 0.6mm; http://ww1.microchip.com/downloads/en/DeviceDoc/39969b.pdf Zynq-7000 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=289, NSMD pad definition (http://www.ti.com/lit/ds/symlink/tlv320aic23b.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf Texas Instruments, DSBGA, area grid, NSMD, YZP0005 pad definition, 1.468x0.705mm, 8 Ball, 2x4 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf BGA 12 0.5 R-XBGA-N12 Texas Instruments, NDQ, 5 pin (https://www.ti.com/lit/ml/mmsf022/mmsf022.pdf TO-PMOD-11 11-pin switching regulator package, http://www.ti.com/lit/ml/mmsf025/mmsf025.pdf Vishay PowerPAK SC70 single transistor package http://www.vishay.com/docs/70487/70487.pdf powerpak sc70 sc-70 dual Vishay PowerPAK 1212-8 Dual (https://www.vishay.com/docs/71656/ppak12128.pdf, https://www.vishay.com/docs/72598/72598.pdf PowerPAK 1212-8 Dual (https://www.vishay.com/docs/71656/ppak12128.pdf, https://www.vishay.com/docs/72598/72598.pdf PowerPAK 1212-8 Single Zetex, SMD, 8 pin DIP socket | | | D1, D2 | 2 Panels/futura medium bt.ttf differ Latest commits for file Datasheets/2N3903-Motorola.pdf # Autorouter files (exported from Pcbnew) *.dsn *.ses Fireball/Fireball VCO saw wave.

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