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DRC as project file ) ) New KiCad version; non Al panel Gerbers # Exported BOM files *.xml *.csv # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ Initial version .gitignore | 65 Hardware/PCB/precadsr/precadsr.kicad_pro | 471 .../precadsr-panel-Gerbers/drill_report.rpt | 26 .../precadsr-panel-CmtUser.gbr | 209 .../precadsr-panel-CuBottom.gbl | 970 .../precadsr-panel-EdgeCuts.gm1 | 26 .../precadsr_panel_al-F_Cu.gbr | 15 .../precadsr_panel_al-NPTH.drl | 55 create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Power_Header.kicad_mod create mode 100644 3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/MIRROR IMAGE.png' Delete '3D Printing/AD&D 1e spell names rendered as raster using Filmoscope Quentin Potentiometers: One potentiometer per step, to set output voltages. (10) - One idea: add a voltage to trigger steps. Replace C10 with 100K resistor, and bridge out R44 with a capacitor / resistor pair, see Fireball's hard sync to schematic, laid out PCB with on-board antenna Bluetooth Dual-mode module with WiFi, https://www.adafruit.com/product/2471 Arduino UNO R3, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf 8devices Carambola2, OpenWRT, industrial SoM computer, https://www.8devices.com/media/products/carambola2/downloads/carambola2-datasheet.pdf Pololu Breakout 16-pin 15.2x20.3mm 0.6x0.8\ Raspberry Pi Zero using through hole M1.6, height 5, Wuerth electronics 9774140360 (https://katalog.we-online.de/em/datasheet/9774140360.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py 20-Lead Plastic Shrink Small Outline (SN) - Narrow, 3.90 mm Body [QFN]; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f100v8.pdf TFBGA-100, 10x10 raster, 10x10mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l072kz.pdf WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.4mm; see section 48.2.4 of http://ww1.microchip.com/downloads/en/DeviceDoc/DS60001479B.pdf WLCSP-81, 9x9, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g483me.pdf ST WLCSP-81, ST die ID 469, 4.02x4.27mm, 81 Ball, 9x9 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g483me.pdf ST WLCSP-81, ST die ID 464, 2.58x3.07mm, 36 Ball, 6x6 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/ts3a24159.pdf Texas Instruments, DSBGA, 0.9x1.9mm, 8 bump 2x4 (perimeter) array, NSMD pad definition Appendix A BGA 400 0.8 CLG400 CL400 Zynq-7000 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=261, NSMD pad definition Appendix A BGA 900 1 FB900 FBG900 FBV900 Kintex-7 and Zynq-7000 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=289, NSMD pad definition Appendix A BGA 196 0.5 CPGA196 Artix-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=273, https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=284, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=84, NSMD pad definition Appendix A BGA 1156 1 RF1157 RF1158 Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=95, NSMD pad definition Appendix A BGA 1156 1 RF1157 RF1158 Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=299, NSMD pad definition Appendix A Kintex-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=300, NSMD pad definition Appendix A BGA 676 1 FB676 FBG676 FBV676 Kintex-7 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=261.

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