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TL0x4, probably

Change page size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane Updates from real TL0x4, fix pots being backwards, tighten up schematic, fit letter instead of A4 c852e5d6ad8630143a633f6c4ffcb4d705a43337 Add note resulting from real TL0x4s re-re-remove the mysterious extra trace 5040873587dbb57684343269abab88d35cf7124b Update Schematics/schematic_bugs_v1.md Latest commits for file Schematics/SynthMages.pretty/C_Rect_L22.0mm_W6.1mm_P20mm_MKT_BIG_RED_CAP.kicad_mod (grid_origin -1.27 106.172 (grid_origin 121.92 119.38 "Notes": "Layer B.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.Paste" "Notes": "Layer B.Mask" "Notes": "Layer F.Paste" "Notes": "Layer F.SilkS" "Notes": "Layer B.Paste" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Paste" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:39:59 2021 ; FORMAT={-:-/ absolute / inch / decimal} Schematics/schematic_bugs_v1.txt Normal file View File Panels/label_test.stl Normal file Unescape Fireball/Fireball.kicad_prl Normal file Unescape module label(string, size=4, halign="center") { PSU/Synth Mages Power Word Stun.kicad_sch | 1943 40 Dwgs.User user hide (0 "F.Cu" signal (31 B.Cu signal hide (31 B.Cu signal (32 "B.Adhes" user "B.Adhesive" (33 "F.Adhes" user "F.Adhesive" (34 "B.Paste" user (35 "F.Paste" user (36 B.SilkS user (37 F.SilkS user (38 B.Mask user (39 "F.Mask" user (40 Dwgs.User user hide (0 "F.Cu" signal (31 "B.Cu" signal (32 B.Adhes user (33 F.Adhes user (34 B.Paste user (35 "F.Paste" user (36 B.SilkS user (37 F.SilkS user (38 B.Mask user (39 "F.Mask" user (40 "Dwgs.User" user "User.Drawings" 41 "Cmts.User" user "User.Comments" 42.

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