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S20B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py 72-Lead Frame Chip Scale Package - 3x3 mm Body [LFCSP]; (see https://www.intersil.com/content/dam/Intersil/documents/l72_/l72.10x10c.pdf LFCSP VQ, 48 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/ Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias with large copper area, as proposed in http://www.ti.com/lit/ds/symlink/tps5430.pdf TSOP-I, 24 Pin (http://www.ti.com/lit/ds/symlink/msp430f1101a.pdf), generated with kicad-footprint-generator Hirose DF13C SMD, CL535-0407-6-51, 7.

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