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If having D + tied is a ceramic 104 power cap like C5, C6, C8, C9, C11, C12; space accordingly C3 and C4 could use fewer caps that way 7022ad9ddb couple more GND-stitch vias eb8580ef62 Undo converting GND to GND_JMP and fix everything that broke created pull request 'pcb_finalization' (#1) from pcb_finalization into main afea9d5a2c Final revision; added custom DRC as project file c4e1c30b9b Add jlc constraints DRC; replace order number text Fireball/Fireball_panel.kicad_pcb | 3 | A1M | \*\*Potentiometer, 9 mm.

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