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SPST CTS_Series194-8MSTN, Piano, row spacing 7.62 mm (300 mils), Socket, LongPads 48-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads 64-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf THT DIP DIL PDIP 2.54mm 25.4mm 1000mil SMDSocket SmallPads 24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), see https://www.power.com/sites/default/files/product-docs/lnk520.pdf Power Integrations E Package eSIP-7F Flat Package with Heatsink Tab, https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf Power Integrations variant of 8-Lead Plastic Dual Flat, No Lead Package (MF) - 3.3x3.3x1 mm Body (http://ww1.microchip.com/downloads/en/DeviceDoc/20005010F.pdf 8-Lead Plastic Dual Flat, No Lead Package (JQ) - 4x4x0.5 mm Body [VDFN] (see Microchip Packaging Specification 00000049BS.pdf UQFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=274), generated with kicad-footprint-generator Molex Nano-Fit Power Connectors, 42819-52XX, With thermal vias in pads, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator Molex SPOX Connector System, 5267-04A, 4 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator connector wire 0.1sqmm strain-relief Soldered wire connection with feed through strain relief, for 2 times 2 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, * Knurl polyhedron width, * Knurl polyhedron width, * Knurl polyhedron height, * Knurl polyhedron width, * Knurl polyhedron width, * Knurl polyhedron height, * Knurled surface smoothing amount ); * If you don't want markings. (RingWidth must be on the circuit board to, dead center v_wall(h=4, l=top_row-rail_clearance*2-thickness-15); // PCB holder pcb_holder(h=10, l=top_row-rail_clearance*2-15-thickness, th=1.15, wall_thickness=1); // lower h-rib reinforcer ## Photos ### Photos ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf.

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