Labels Milestones
Back3 days 1 day Schematics/OttosIrresistableDance/OttosIrresistableDance.kicad_pcb Normal file Unescape BeginCmp TimeStamp = /551D9380; Reference = P4; ValeurCmp = Analog; IdModule = Socket_Arduino_Nano:Socket_Strip_Arduino_1x15; EndCmp BeginCmp TimeStamp = /551D9466; Reference = P2; ValeurCmp = Digital; IdModule = Socket_Arduino_Nano:Socket_Strip_Arduino_1x15; EndCmp BeginCmp TimeStamp = /551D9432; Reference = P4; ValeurCmp = CONN_1; IdModule = Socket_Arduino_Nano:1pin_Nano; EndCmp Hardware/PCB/precadsr/precadsr.kicad_pcb Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/C_Disc_D3.0mm_W1.6mm_P2.50mm.kicad_mod Normal file View File Schematics/Rampage_V1_4_Sch.pdf Normal file Unescape 3D Printing/Pot_Knobs/knob3433271.scad Executable file View File fp-info-cache Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Bourns_3296W_Vertical_screw_centered.kicad_mod Normal file View File Fireball/Fireball_panel.kicad_prl Normal file Unescape Schematics/SynthMages.pretty/P160_pot_hole_nonpcb.kicad_mod Normal file View File Examples/EG_MANUAL.pdf Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Molex_KK-254_AE-6410-08A_1x08_P2.54mm_Vertical.kicad_mod Normal file Unescape Hardware/PCB/precadsr/precadsr.cmp Normal file Unescape Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes unplated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) Total plated holes unplated through holes: unplated through holes: unplated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) Total plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape PSU/Synth Mages Power Word Stun.kicad_prl | 6 .../Jack_6.35mm_PJ_629HAN.kicad_mod | 34 .../PCB/precadsr_Gerbers/precadsr-F_Mask.gbr | 4 README.md | 8 "active_layer_preset": "All Layers", "active_layer_preset": "All Copper Layers", re-re-remove the mysterious extra trace 4c5e03f875a81278be4b8089dd10dd98b0c86e5d Add scad for v3.2 From 5aaea69ed6fde3a14d8431b95cdb61f2e99d3f78 Mon Sep 17 00:00:00 2001 Subject: [PATCH] SVG decontamination Hardware/Panel/precadsr_panel.svg | 4 .../PCB/precadsr_Gerbers/precadsr-job.gbrjob | 2 pin Molex header 2.54 mm spacing"/>