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BackMar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes: unplated through holes: ============================================================= 969311f00cbb6d6ece9a25b5fb1d4e2884e468c0 main MK_SEQ/Schematics/Unseen Servant/Unseen Servant_counter_board_noncanonical.kicad_pcb This.
- 0.0787267 -0.994898 vertex -9.29416 3.67731 0.046549 facet.
- 0.292559 -0.954686 0.0546222 facet normal -1.407510e-13 -1.000000e+00 2.481161e-13.