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32ded0979b Fix rail clearance issues, add PCB slot, more options for potentiometer spoke placement' (#1) from pcb_finalization into main 3d279dd88c Finish schematic, add PDF' (#2) from schematic into main 1705ad98fb Put title box in PDF export // Something Positive 2015-02-23 19:36:05 -08:00 main arrasta/README.md 0 lines From 84596d5a5ed3dcb31f8d011b430a2595f00d25a1 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Fix for component clearance, panel thickness from printer .../luther_triangle_10hp_rib_space_fixes.stl | Bin 138868 -> 139972 bytes Docs/precadsr_bom.md | 3 create mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/fastestenv_Pot_Hole.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/DIP-8_W7.62mm_Socket_LongPads.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Wall_wart_A-4118.kicad_mod create mode 100644 Docs/precadsr_layout_back.pdf (grid_origin 97.28 88.9 Mon 10 May 2021 12:33:34 AM EDT **Component Count:** 75 **Component Count:** 76 Docs/precadsr_layout_back.pdf Normal file Unescape f33ea6a168 Go to file db7d02719b Find and replace last few thin traces, fix teardrops and gnd fill Embiggen traces, add teardrops updated C5 footprint & tracing; schematic annotation Add 55k-ish resistor to coarse knob to fix tuning range updates the potentiometer pads and trace routing to de-bodge the pots. From dd8fda85b17279e6d8dbcb525c226736e6399cf9 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Align panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability Align panel to integer pseudo-origin, remove testing text, decrease title label font so we don't lose it Futura Heavy BT.ttf => Panels/Futura Heavy BT.ttf => Panels/Futura Heavy BT.ttf | Bin 0 -> 13714 bytes .../precadsr-panel-Gerbers/precadsr-panel.drl .

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