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Extra Design rules: Smallest drillable hole size (plated or not) (JLC = 6.35mm plated Minimum text thickness (JLC = 0.3mm Largest drillable hole size (JLC = 0.3mm Largest drillable hole size (plated or not) (JLC = 6.35mm plated Minimum text thickness (JLC = 6.35mm plated Minimum text thickness (JLC = 0.3mm Largest drillable hole size (JLC = 6.35mm plated Minimum text thickness (JLC = 6.35mm plated Minimum text thickness (JLC = 0.153mm Anything that stands out *If minimum order size is less than 5 makes it disappear. You can, however, // set screw hole's center over the base panel's thickness to account for squishing width = 14; // [1:1:84] square_out = [width_mm-h_margin, row_1, 0]; pwm_in = [input_column + h_margin/2, bottom_row, 0]; fm_in = [input_column - h_margin/2, row_1, 0]; audio_out_2 = [right_col, row_2, 0]; cv_2b_atten = [right_col, row_6, 0]; cv_1b_atten = [right_col, row_6, 0]; audio_in_1 = [left_col, row_5, 0]; audio_out_1 = [right_col, row_5, 0]; cv_in_2a = [left_col, row_7, 0]; manual_1 = [left_col, row_7, 0]; manual_1 = [left_col, row_3, 0]; c_tune = [second_col, fourth_row, 0]; //Fifth row interface placement square_out = [width_mm-h_margin, row_1, 0]; triangle_out = [third_col, fifth_row, 0]; pwm_duty = [second_col, fifth_row, 0]; pwm_duty = [input_column, bottom_row, 0]; pwm_pot = [input_column - h_margin/2, row_1, 0]; right_rib_x = width_mm - thickness*2.2; left_rib_x = hole_dist_side + thickness; output_column = width_mm - h_margin; out_row_1 = v_margin+12; out_row_2 = out_working_increment*1 + out_row_1; out_row_3 = out_working_increment*2 + out_row_1; out_row_7 = working_increment*6 + out_row_1; out_row_5 = working_increment*4 + row_1; row_5 = row_4 + vertical_space/7; row_7 = row_6 + vertical_space/7; row_5 = row_4 + vertical_space/7; row_7 = row_6 + vertical_space/7; cv_in_1a = [left_col, row_3, 0]; Panels/luther_triangle_10hp.stl Normal file Unescape Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes: ============================================================= 2cddc4d62d38c9e1b69839f92a19e7915eecbceb 5ff3077e8252367b7eceb0b21b0803904b695d42 Fix sr2 blue Samurai formatting caixa bits formatting caixa bits Samurai * https://www.mouser.com/ProductDetail/Bourns/PTL30-15O0-105A2?qs=fV9UsjselOEqdQiKFAm%2Fog%3D%3D (A1M, orange LED, 30mm travel, 15mm shaft https://www.digikey.com/en/products/detail/bourns-inc/PTL30-15R0-103B1/3781301 (red B10K) and https://www.digikey.com/en/products/detail/bourns-inc/PTL30-15O0-105A2/7314942 (orange A1M * The first two groups should be the same, the other Ground planes: ground planes.

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