3
1
Back

48 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator Molex Sabre Power Connector, 46007-1104, With thermal vias in pads, 5 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator JST J2100 series connector, BM07B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator Molex Sabre Power Connector, 43160-0102, With thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/ Infineon PG-DSO 12 pin, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline (SS)-5.30 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf 80-Lead Plastic Thin Shrink Small Outline (SO), see http://datasheet.octopart.com/OPIA403BTRE-Optek-datasheet-5328560.pdf 4-Lead.

New Pull Request