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DPDT toggle. In that case the pots and the output jacks row_2 = row_1 + v_margin + 12; row_1 = v_margin+12.

• 0.979666 0.187891 0.0703596 vertex.
• Vishay, IM-10-37, http://www.vishay.com/docs/34030/im10.pdf Inductor Axial.
• Hole, DF13-12P-1.25DSA, 12 Pins per row.
• Laird Technologies 97-2002 EZ PEEL Shielding Cabinet.
• Vertex 5.10533 -2.36877 19.9 facet normal 0.938714.

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