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Back* this is good practice, but ho-dang what a mess From 7022ad9ddb43c592e11528a5ae21edf443c088e4 Mon Sep 17 00:00:00 2001 eb8580ef62 Undo converting GND to GND_JMP and fix everything that broke From 969311f00cbb6d6ece9a25b5fb1d4e2884e468c0 Mon Sep 17 00:00:00 2001 Subject: [PATCH 15/18] Add jlc constraints DRC; replace order number text Compare 19 commits » c971d0bd8b Merge pull request 'Fix rail clearance issues, make all power traces large "rules": { PCB initial layout, no traces "silk_text_size_h": 1.0, "silk_text_size_v": 1.0, PCB initial layout, no traces PCB initial layout, no traces }, Add ground fills, fix some clearance issues, add PCB slot, more options for.
- 0.586681 vertex 6.30465 1.57006 19.9.
- -0.681165 0.72537 0.0992586 vertex -6.37424 7.70513.
- 1.46317 6.0001 vertex -7.35588 1.46317 6.0001 vertex -6.92909.
- 2x32, 1.00mm pitch, double cols (from Kicad.