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Temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00 2001 Subject: [PATCH] init PSU/Synth Mages Power Word Stun.kicad_pcb Normal file View File 3D Printing/Cases/Eurorack 2-Row/d0689b08d90f6b787384d8519c91dddf_preview_featured.jpg Executable file View File Panels/FireballSpellSmall.png Executable file View File 3D Printing/Cases/Eurorack Modular Case/EuroRack_Case_Power.stl Executable file View File 3D Printing/Pot_Knobs/FS_PotiKnob_d6D12h9.stl Executable file View File Schematics/Unseen Servant/Unseen Servant.kicad_prl | 4 | 100k | Resistor | | | | Tayda | A-159 | | | | | | Tayda | A-1847 | | | | J3, J4, J5 | 3 | 2N3904 | 0.2A Ic, 40V Vce, Small Signal.

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