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Https://ac-dc.power.com/sites/default/files/product-docs/tinyswitch-iii_family_datasheet.pdf PowerIntegrations variant of MSOP-16 (see http://cds.linear.com/docs/en/datasheet/3630fd.pdf 12-Lead Plastic DFN (6mm x 5mm) (see http://www.everspin.com/file/236/download DFN8 2x2, 0.5P; No exposed pad (http://cds.linear.com/docs/en/datasheet/34301fa.pdf SSOP 0.65 exposed pad TSSOP, 14 Pin (https://www.ti.com/lit/ds/symlink/tpd6e05u06.pdf#page=28), generated with kicad-footprint-generator Molex MicroClasp Wire-to-Board System, 55935-1210, with PCB locator, 13 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py UQFN, 10 Pin (https://www.johansontechnology.com/datasheets/0900FM15K0039/0900FM15K0039.pdf), generated with kicad-footprint-generator Molex SPOX Connector System, 43045-1021 (alternative finishes: 43045-042x), 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 16 Pin (http://www.st.com/resource/en/datasheet/lis331hh.pdf), generated with kicad-footprint-generator Hirose DF11 through hole, DF63R-3P-3.96DSA, 3 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator ipc_gullwing_generator.py TO-252/DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-3-1/ D2PAK DDPAK TO-263 D2PAK-3 TO-263-3 SOT-404 diode TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-5-1/ D2PAK DDPAK TO-263 D2PAK-7 TO-263-7 SOT-427 TO-263 / D2PAK / DDPAK SMD package, http://www.onsemi.com/pub/Collateral/ENA2192-D.PDF Analog Devices (Linear Tech), 133-pin BGA uModule, 15.0x15.0x4.92mm, https://www.analog.com/media/en/technical-documentation/data-sheets/4637fc.pdf MAPBGA 9x9x1.11 PKG, 9.0x9.0mm, 272 Ball, 17x17 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=25 FBGA-78, 10.5x9.0mm, 78 Ball, 9x13 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=28 FBGA-96, 14.0x9.0mm, 96 Ball, 9x16 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=25 FBGA-78, 10.5x9.0mm, 78 Ball, 9x13 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=24 FBGA-78, 10.5x8.0mm, 78 Ball, 9x13 Layout, 0.8mm Pitch, https://www.infineon.com/cms/en/product/packages/PG-LFBGA/PG-LFBGA-292-11/ LFBGA-100, 10x10 raster, 4.201x4.663mm package, pitch 0.8mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf WLCSP-81, 9x9 raster, 3.693x3.815mm package, pitch 0.4mm; see section 7.1.1 of http://www.st.com/resource/en/datasheet/stm32f401ce.pdf WLCSP-49, 7x7 raster, 3.89x3.74mm package, pitch 0.6mm; http://ww1.microchip.com/downloads/en/DeviceDoc/39969b.pdf Zynq-7000 BGA, 20x20 grid, 17x17mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=279, NSMD pad definition (http://www.ti.com/lit/ds/symlink/tlv320aic23b.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf Texas Instruments, BGA Microstar Junior, 2x2.5mm, 12 bump 4x3 grid, NSMD pad definition Appendix A Zynq-7000 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=264, NSMD pad definition Appendix A BGA 484 1 FG484 FGG484 Artix-7 BGA, 19x19 grid, 10x10mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32l011k3.pdf WLCSP-36, 6x6 raster, 2.553x2.579mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for ECP5 FPGAs, based on a regular polygon. ≥30 means "round, using current quality setting". Setscrew_hole_faces = 20; // [0:0%, 10:10%, 20:20%, 30:30%, 40:40%, 50:50%] // Width of module (HP) width = 36; // [1:1:84] width = 17; // [1:1:84] /* [Holes] */ hole_dist_top = 2.5; rail_clearance = 9; // mm from very top/bottom edge and where it is machine-specific data Latest commits for file Images/PXL_20210831_004139245.jpg 054c37512a Delete '3D Printing/Panels/FIREBALL VCO.png' Delete '3D Printing/Panels/FIREBALL VCO.png' 3D Printing/Panels/FIREBALL VCO.png differ false XS3 FM CV From c852e5d6ad8630143a633f6c4ffcb4d705a43337 Mon Sep 17 00:00:00 2001 Subject: [PATCH] github url .../PCB/precadsr_Gerbers/precadsr-B_Cu.gbr | 4 .../PCB/precadsr_Gerbers/precadsr-PTH.drl | 207 .../PCB/precadsr_Gerbers/precadsr-job.gbrjob | 2 | 1N5817 .

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