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Thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline (ST)-4.4 mm Body [SOIC], pin 7 8-lead though-hole mounted DIP package, row spacing 11.48 mm (451 mils 18-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils 18-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300.

• Normal -3.519684e-001 -6.132874e-001 7.071046e-001.
• Normal 0.436801 -0.865139 0.246453 vertex 6.92883.

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