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CL535-0407-6-51, 7 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py DC6 Package; 6-Lead Plastic Small Outline (SO) (http://www.everlight.com/file/ProductFile/201407061745083848.pdf 5-Lead Plastic Small Outline (SS)-5.30 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf 8-Lead Plastic Small Outline No-Lead 8-Lead Plastic SO, Exposed Die Pad (TI DDA0008B, see http://www.ti.com/lit/ds/symlink/lm3404.pdf 8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm² body, exposed pad, 4x4mm body, pitch 0.5mm UFBGA-64, 8x8 raster, 3.357x3.657mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf WLCSP-64, 8x8 raster, 4.466x4.395mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f031k6.pdf WLCSP-25, 5x5 raster, 2.133x2.070mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf WLCSP-81, 9x9 raster, 4x4mm package, pitch 0.4mm; see.

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