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Exclude_from_pos_files exclude_from_bom) Final revision; added custom DRC as project file new_footprints Added hard sync to schematic, laid out PCB with on-board components Added hard sync to schematic, laid out PCB with on-board components PCB initial layout, no traces "other_line_width": 0.15, PCB initial layout, no traces "solder_mask_clearance": 0.0, PCB initial layout, no traces "silk_line_width": 0.15, PCB initial layout, no traces "copper_text_size_h": 1.5, "copper_text_size_v": 1.5, "copper_text_thickness": 0.3, PCB initial layout, no traces PCB initial layout, no traces "silk_line_width": 0.15, PCB.

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