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Back2dd0b8c0c736720a0b064bbe1304dc9562beb260 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Update 'README.md' From ec67859b1c2779470b99801ce69f8850b83fa3e1 Mon Sep 17 00:00:00 2001 Subject: [PATCH] updates led holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf 44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.41x1.98mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf 25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes to 5mm + unplated, and revises jack footprint a3181ad06b Add correct footprints to fireball Add correct footprints to fireball Add correct footprints to fireball Latest commits for file Docs/build.md footprint "Perfboard_3x12" (version 20221018) (generator pcbnew Latest commits for branch bugfix/10hp Am totally not using git correctly Latest commits for file caixa_sr2.png Fix sr2 blue 2cddc4d62d formatting caixa bits Samurai * https://www.mouser.com/ProductDetail/Bourns/PTL30-15O0-105A2?qs=fV9UsjselOEqdQiKFAm%2Fog%3D%3D (A1M, orange LED, 30mm travel, 15mm shaft ** https://www.mouser.com/ProductDetail/Bourns/PTL30-15R0-103B1?qs=X8nz4ozed5glbMOCRmYKzw%3D%3D (B10K, red LED, 30mm travel, 15mm shaft ** https://www.digikey.com/en/products/detail/bourns-inc/PTL30-15R0-103B1/3781301 (red B10K) and https://www.digikey.com/en/products/detail/bourns-inc/PTL30-15O0-105A2/7314942 (orange A1M) The first two groups should be 10 nF. Documentation ## Mechanical assembly Documentation # ---> KiCad # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: https://kicad.org/help/file-formats/ # Netlist files (exported from Eeschema) *.net # Autorouter files (exported from Eeschema *.net # Autorouter files (exported from Pcbnew) Initial version .gitignore | 2 | 1 | 1uF | Film capacitor | | | C3, C4, C10 | 1 | Synth_power_2x5 | 2x5 pin shrouded header 2.54 mm spacing Q1, Q2, Q3 | 3 | 100R | Resistor | | | | | | | | | U1 | 1 | TL074 | Quad Low-Noise JFET-Input Operational Amplifiers, DIP-8/SOIC-8/TSSOP-8/VSSOP-8
- -1.650539e-03 9.663628e-01 facet normal -2.890019e-001 4.954580e-001 8.191454e-001 facet.
- -0.630556 -0.768559 0.108246 facet.
- Connector, LY20-10P-DLT1, 5 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf.
- -2.013369e+000 5.249184e+000 1.747200e+001 facet normal -0.618884.