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Format documentation: https://kicad.org/help/file-formats/ # Temporary files *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *-backups */fp-info-cache *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache # Netlist files (exported from Eeschema *.csv *.lck ########################## # Additional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole) Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole Total plated holes count 0 Minor layout tweaks Schematics/Fireball_VCO.pdf | Bin 0 -> 10724 bytes 3D Printing/Panels/MAGIC MISSILE VCF.png' .../Panels/MAGIC MISSILE VCF.png differ v1.1 Go to file Latest commits for file Images/PXL_20210831_000949090.jpg 2cb8e5eaf6 Go to file From 33729ec97f6dd2ed68c4ca06088ce0b21651948d Mon Sep 17 00:00:00 2001 Subject: [PATCH] glide fix - Errant connection between R25 and R1. This needs to be able to add picture 676d1403e6 Upload files to '3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/Panels/MAGIC MOUTH.png create mode 100644 Hardware/PCB/precadsr_aux_Gerbers/precadsr-NPTH.drl create mode 100644 Hardware/PCB/precadsr/precadsr.net create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alpha_RD901F-40-00D_Single_Vertical_CircularHoles.kicad_mod create mode 100644 Schematics/Enlarge/Enlarge.kicad_pro main precadsr/LICENSE 122 lines main synth_tools/3D Printing/Pot_Knobs/Potentiometer Cap.STL From c5e8dbdd1f5bb4b2a027556e63f3cebc1db3a56a Mon Sep 17 00:00:00 2001 Subject: [PATCH] Checkpoint in case of crashes Fix getting a bunch of wires backwards Fix getting a bunch of wires backwards Fix getting a bunch of wires backwards e6b834b08c Fix floating pin for op amp style (thickness 0.15) (arrow_length 1.27) (text_position_mode 0) (extension_height 0.58642) (extension_offset 0) keep_text_aligned Add control label font size to 9mm and align it precisely for repeatability b11a8d3187 Change transistor footprint to inline_wide, fix DRC ground plane created pull request 'pcb_finalization' (#1) from pcb_finalization into main 1705ad98fb Put title box.

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