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Designed using KiCad: https://www.kicad.org/ # Format documentation: http://kicad-pcb.org/help/file-formats/ # Temporary files *.000 *.bak *.bck *.kicad_pcb-bak *.kicad_sch-bak *.kicad_prl *.kicad_pro *.rules *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache *.lck # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= e49f4ab127dc081ee1c77dd21e80d128628a1152 9060b76361734f9abf9a1c676dd9110e9ced917b initial kicad project initial kicad project .../OttosIrresistableDance.kicad_pcb | 2 | 10uF | Polarized capacitor | Tayda | A-4349 | .

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