3
1
Back

0.635mm pitch (https://www.intel.com/content/dam/www/public/us/en/documents/packaging-databooks/packaging-chapter-02-databook.pdf, http://www.nxp.com/docs/en/application-note/AN4388.pdf PQFP, 132 pins, 24mm sq body, 0.65mm pitch (http://cache.freescale.com/files/shared/doc/package_info/98ASS23330W.pdf, http://www.nxp.com/docs/en/application-note/AN4388.pdf PQFP, 132 pins, 24mm sq body, 0.65mm pitch (http://ww1.microchip.com/downloads/en/DeviceDoc/14L_VDFN_4_5x3_0mm_JHA_C041198A.pdf DE Package; 14-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_16_05-08-1706.pdf DHD Package; 18-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_12_05-08-1725.pdf DE/UE Package; 12-Lead Plastic DFN (5mm x 3mm) (see Linear Technology 05081733_A_DF12.pdf DFN12, 4x4, 0.65P; CASE 506CE (see ON Semiconductor 506CE.PDF DD Package; 8-Lead Plastic Small Outline (SO), see https://docs.broadcom.com/docs/AV02-0173EN 4-Lead Plastic Stretched Small Outline No-Lead 8-Lead Plastic Dual Flat, No Lead Package (MR) - 9x9x0.9 mm Body [SSOP] (see Microchip.

New Pull Request