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LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole) Total plated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) Total plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Schematics/SynthMages.pretty/Perfboard_4x12.kicad_mod Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal.kicad_mod Normal file Unescape Hardware/Panel/precadsr-panel/precadsr-panel.kicad_sch Normal file Unescape Hardware/PCB/precadsr_aux_Gerbers/precadsr-F_Paste.gbr Normal file View File 3D Printing/6u_wing_v1.scad → 3D Printing/Cases/6u_wing_v1.scad Binary files /dev/null and b/3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels' 0 0 Y N.

7.2mm Capacitor C, Rect series, Radial, pin.
Sure to use for the Adafruit Feather WICED.

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