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Pin Placed - Wide, 5.3 mm Body [TQFP] With 4.5x4.5 mm Exposed Pad (see https://www.diodes.com/assets/Package-Files/SO-8EP.pdf 20-Lead Plastic Thin Quad Flatpack (PF) - 14x14mm body, 9.5mm sq thermal pad TQFP64 7x7, 0.4P CASE 932BH (see ON Semiconductor 506AF.PDF DKD Package; 32-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_14_05-08-1708.pdf DFN14, 4x4, 0.5P; CASE 505AB (see ON Semiconductor 506BU.PDF 8-Lead Plastic DFN (6mm x 5mm) (see Linear Technology DFN_16_05-08-1706.pdf DHD Package; 16-Lead Plastic HTSSOP (4.4x5x1.2mm); Thermal pad; (http://www.ti.com/lit/ds/symlink/drv8833.pdf HTSSOP, 16 Pin (JEDEC MS-013AC, https://www.analog.com/media/en/package-pcb-resources/package/233848rw_20.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py LQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/ldc1312.pdf#page=59), generated with kicad-footprint-generator Soldered wire connection, for 3 times outer diameter, generated with kicad-footprint-generator Soldered wire connection with feed through strain relief, for 3 times outer diameter, generated with kicad-footprint-generator JST XH series connector, 53398-1571 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 28 Pin (https://www.cmlmicro.com/wp-content/uploads/2017/10/CMX901_ds.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py eSIP-7C Vertical Flat Package with Heatsink Tab, see https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf Power Integrations K Package PowerPAK SO-8 Single (https://www.vishay.com/docs/71655/powerpak.pdf, https://www.vishay.com/docs/72599/72599.pdf 16-Lead Plastic DFN (5mm x 4mm) (see Linear Technology DFN_16_05-08-1706.pdf DHD Package; 16-Lead Plastic DFN (5mm x 5mm) (see http://www.everspin.com/file/236/download DFN8 2x2, 0.5P (https://www.onsemi.com/pub/Collateral/511AT.PDF On Semiconductor, SIP-38, 9x7mm, (https://www.onsemi.com/pub/Collateral/AX-SIP-SFEU-D.PDF#page=19 8-Lead Plastic Dual Flat, No Lead Package (MD) - 4x4x0.9 mm Body [DFN-S] (see Microchip Packaging Specification 00000049BS.pdf 80-Lead Plastic Thin Shrink Small Outline (SO) - Wide, 5.3 mm Body [HTSSOP], with thermal vias; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00284211.pdf WLCSP-104, 9x12 raster, 4.095x5.094mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf VFBGA-49, 7x7, 5x5mm package, pitch 0.5mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf WLCSP-143, 11x13 raster, 4.539x5.849mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf TFBGA-265, 17x17 raster, 14x14mm package, pitch 0.65mm VFBGA-86, 6.0x6.0mm, 86 Ball, 10x10 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32u575og.pdf#page=306 ST WLCSP-100, ST die ID 472, 4.36x4.07mm, 81 Ball, 9x9 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100168.PDF XBGA-121, 11x11 raster, 10x10mm package, pitch 0.5mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f411vc.pdf WLCSP-49, 7x7 raster, 3.417x3.151mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zd.pdf WLCSP-64, 8x8 raster, 5x5mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f301r8.pdf WLCSP-49, 7x7 raster, 3.89x3.74mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UCBGA-49, 7x7 raster, 2.999x3.185mm package, pitch 0.4mm; see section 36.2.3 of.

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