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"Layers L1/L2" "Notes": "Layer F.SilkS" "Notes": "Layer F.SilkS" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_Pot_Hole.kicad_mod Normal file Unescape Synth Mages Power Word Stun Panel.kicad_prl Normal file Unescape Hardware/PCB/precadsr_aux_Gerbers/precadsr-PTH.drl Normal file Unescape DEF.

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