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BackHttp://www.st.com/resource/en/datasheet/DM00282249.pdf WLCSP-90, 10x9 raster, 4.223x3.969mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f301r8.pdf WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f301r8.pdf WLCSP-49, 7x7 raster, 2.965x2.965mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f301r8.pdf WLCSP-49, 7x7 raster, 2.999x3.185mm package, pitch 0.5mm UFBGA-64, 8x8 raster, 4.466x4.395mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf Lattice caBGA-381 footprint for ECP5 FPGAs, 27.0x27.0mm, 756 Ball, 32x32 Layout, 0.8mm Pitch, https://www.st.com/resource/en/datasheet/stm32mp151a.pdf ST TFBGA-361, 12.0x12.0mm, 361 Ball, 23x23 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32wl54jc.pdf ST UFBGA-121, 6.0x6.0mm, 121 Ball, 11x11 Layout, 0.5mm Pitch, S-PWSON-N10, DSC, http://www.ti.com/lit/ds/symlink/tps63060.pdf USON-10 2.5x1.0mm_ Pitch 0.5mm https://www.nxp.com/docs/en/application-note/AN10343.pdff Fairchild-specific MicroPak2-6 1.0x1.0mm Pitch 0.35mm HVSON, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/20005474E.pdf#page=25), generated with kicad-footprint-generator JST PUD series connector, SM13B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py LQFN, 10 Pin.
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