3
1
Back

-4.933095e-003 6.247017e-001 vertex 4.116141e+000 1.627492e+000 2.488700e+001 facet normal -0.706045 -0.0555529 0.705985 vertex 4.4 1.672 19.1916 vertex 5.86953 -1.46953 19.4867 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 63579cf959 Add notes about UX component wiring initial notes for other changes requested

  • Add note that C12 is optional; not needed if using real TL0x4, fix pots being backwards, tighten up schematic.

    New Pull Request