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12x12 grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/opa330.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments EUS 5 Pin Double Sided Module Texas Instruments DSBGA BGA YZP R-XBGA-N6 Texas Instruments, DSBGA, area grid, NSMD, YZP0005 pad definition.

• Vertex 4.57918 5.11681 7.04537 vertex.
• -0.0600084 0.987629 vertex 4.51686 -0.737827.
• 0.900349 -0.423688 0.0993032 facet normal 0.76848.

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