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Pitch, https://www.nxp.com/docs/en/package-information/98ASA00869D.pdf#page=1 MAPBGA 14x14x1.18 PKG, 14.0x14.0mm, 289 Ball, 17x17 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/tps63000.pdf 3x3mm Body, 0.5mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/ACS711-Datasheet.ashx Allegro Microsystems 24-Lead Plastic Shrink Small Outline (SO) - Wide, 7.50 mm Body [WSON], http://www.ti.com/lit/ml/mpds421/mpds421.pdf WSON-16 3.3 x 1.35mm Pitch 0.4mm WLCSP WLCSP/XFBGA 8-pin package, staggered pins, http://www.adestotech.com/wp-content/uploads/DS-AT25DF041B_040.pdf WLCSP WLCSP-8 XFBGA XFBGA-8 CSP BGA Chip-Scale Glass-Top WLCSP-8, 2.284x1.551mm, 8 Ball, 2x4 Layout, 0.5mm Pitch, DSC0010J, WSON, http://www.ti.com/lit/ds/symlink/tps61201.pdf Plastic Small Outline (SN) - Narrow, 3.90 mm Body (http://ww1.microchip.com/downloads/en/DeviceDoc/20005010F.pdf 8-Lead Plastic Small Outline (SS)-5.30 mm Body [QFN] with corner pads; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf TDFN, 6 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=11791&prodName=TLP185), generated with kicad-footprint-generator ipc_gullwing_generator.py eSIP-7C Vertical Flat Package with Heatsink Tab, https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf Power Integrations K Package PowerPAK SO-8 Dual (https://www.vishay.com/docs/71655/powerpak.pdf, https://www.vishay.com/docs/72600/72600.pdf PowerPAK SO-8 Dual (https://www.vishay.com/docs/71655/powerpak.pdf, https://www.vishay.com/docs/72600/72600.pdf PowerPAK SO-8 Single (https://www.vishay.com/docs/71655/powerpak.pdf, https://www.vishay.com/docs/72599/72599.pdf 16-Lead Plastic TSSOP (4.4mm); Exposed Pad (see https://www.diodes.com/assets/Datasheets/AP2204.pdf SSOP 0.50 exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-87/ 12-Lead Plastic Micro.

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