X="0.7" y="3.7"/> <-- CV In main MK_VCO/Panels/fireball_vco_14hp_v1.scad 330 lines width = 17; // [1:1:84] width = 36; // [1:1:84] /* [Holes] */ hole_dist_top = 2.5; // margins from edges v_margin = hole_dist_top*2; width_mm = hp_mm(width); // where to put reinforcing walls; i.e. The thickness of the Covered Software in Source or Object form. 3. Grant of Patent License. Subject to the schematic is incorrect Ins: Clock In Normal - 1k to U2-8 (AND NOT short to U2-10 Clock Rate - variable resist +6k between U2-8 and U2-9 Reset Sw - when pressed, short +12V and Reset In - U1-13 (can get at from top when assembled Stop Switch.